[isabelle-dev] VHDL verified and validated by Isabelle HOL

David Blubaugh davidblubaugh2000 at yahoo.com
Tue Sep 25 22:10:34 CEST 2012

To All,

I was wondering if any one was ever validate VHDL or Verilog with Isabelle HOL ??  Has any one developed a means to check for correctness of a preexisting VHDL file ??


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